Memory Protection for ST Microelectronics

Owned by Adam Czajkowski
Oct 12, 2021
3 min read

Configuration options in this section are separated by a prefix:

  • The STM32 prefix limits the effect of these options to STM32 and STSPIN32 MCUs.

  • The STMBLUENRG prefix limits the effect of these options to “STM-BlueNRG” MCUs.

1. “STM32_MemoryProtSource”

This configuration option specifies whether the configuration file should be used as the source of memory protection bit values, or if the code file should be used as the source. The options specified in the main GUI are the same ones saved in the configuration file (User-defined option). If the code file is used as the source, the protection bits must be specified at the correct address within the code file. Correct addresses can be obtained from device manuals. The GUI provides an option to inspect memory protection bits as read from the code file (From File option).

If the FILE_SOURCE value is chosen for this parameter, the only parameters in this section that will also be read are "STM32_PROT_WrEn", "STM32_USER_WrEn", "STM32_RDP_WrEn", "STM32_OEMKey1_En", "STM32_OEMKey2_En", and "STMBLUENRG_PROT_WrEn".

  • USER_SOURCE (0) : Protection settings from the configuration file will be used (can be user defined in GUI).

  • FILE_SOURCE (1) : Protection settings from code file will be used (code file must include protection bits at proper addresses). (default)

2. "STM32_PROT_WrEn"

This configuration parameter enables writes to Flash Memory Protection Read and Write, PCROP, and SEC bytes, within the Option Bytes MCU area.

Logically grouped together with "STM32_WRP0_Data" - "STM32_WRP7_Data", "STM32_PCROP0_Data" - "STM32_PCROP7_Data", and "STM32_SEC0_Data" - "STM32_SEC7_Data" parameters.

  • 1 : enabled

  • 0 : disabled (default)

2.1. "STM32_WRP0_Data" - "STM32_WRP7_Data"

Value that will be written to the WRP0-7 or nWRP0-7 registers if "STM32_PROT_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Not all STM32 families have these registers. Ignored otherwise.

2.2. "STM32_PCROP0_Data" - "STM32_PCROP7_Data"

Value that will be written to the PCROP0-7 registers if "STM32_PROT_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Not all STM32 families have these registers. Ignored otherwise.

2.3. "STM32_SEC0_Data" - "STM32_SEC7_Data"

Value that will be written to the SEC0-7 registers if "STM32_PROT_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Not all STM32 families have these registers. Ignored otherwise.

3. “STM32_USER_WrEn”

This configuration parameter enables writes to User Configuration Option Bytes and data registers.

Logically grouped together with "STM32-USERREG_Data", "STM32_Data0", and"STM32_Data1".

  • 1 : enabled

  • 0 : disabled (default)

3.1. "STM32-USERREG_Data"

Value that will be written to the User Configuration Option Bytes register if "STM32_USER_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

3.2. "STM32_Data0" - "STM32_Data1"

Value that will be written to the User Configuration Data0-1 registers if "STM32_USER_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Not all STM32 families have a Data0 and Data1 register. Ignored otherwise.

4. "STM32_RDP_WrEn"

This configuration parameter enables writes to the register that controls reading of Flash Memory and communication debug access.

Logically grouped together with "STM32_RDP_Data".

  • 1 : enabled

  • 0 : disabled (default)

4.1. "STM32_RDP_Data"

Value that will be written to the RDP register if "STM32_RDP_Data" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

5. "STM32_OEMKey1_En"

This configuration parameter enables writes to the registers that controls reading debug access.

Logically grouped together with "STM32_OEM1_Data0" - "STM32_OEM1_Data1".

  • 1 : enabled

  • 0 : disabled (default)

5.1. "STM32_OEM1_Data0" - "STM32_OEM1_Data1"

Value that will be written to the OEM1 data register 0-1 if "STM32_OEMKey1_En" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Not all STM32 families have these registers. Ignored otherwise.

6. "STM32_OEMKey2_En"

This configuration parameter enables writes to the registers that controls reading debug access.

Logically grouped together with "STM32_OEM2_Data0" - "STM32_OEM2_Data1".

  • 1 : enabled

  • 0 : disabled (default)

6.1. "STM32_OEM2_Data0" - "STM32_OEM2_Data1"

Value that will be written to the OEM2 data register 0-1 if "STM32_OEMKey2_En" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Not all STM32 families have these registers. Ignored otherwise.

7. "STMBLUENRG_PROT_WrEn"

This configuration parameter enables writes to the registers that controls reading debug access to ST BlueNRG MCUs.

Logically grouped together with "STMBLUENRG_4LOWBYTES", and "STMBLUENRG_4HIGHBYTES".

  • 1 : enabled

  • 0 : disabled (default)

7.1. "STMBLUENRG_4LOWBYTES"

Value that will be written to 4 lower bytes of the 64-bit read-out protection register if "STMBLUENRG_PROT_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

7.2. "STMBLUENRG_4HIGHBYTES"

Value that will be written to 4 upper bytes of the 64-bit read-out protection register if "STMBLUENRG_PROT_WrEn" is enabled, and “STM32_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.