Memory Protection for Texas Instruments-ARM

Owned by Adam Czajkowski
Last updated: Nov 27, 2024
5 min read

Configuration options in this section are separated by a prefix:

  • The LM prefix limits the effect of these options to “Stellaris Cortex M3”, “Stellaris Cortex M4”, and “TIVA-C Cortex M4” MCUs.

  • The MSP432 and RF432 prefixes limit the effect of these options to “MSP432 Cortex M4” MCUs.

1. "LM_MemoryProtSource"

This configuration option specifies whether the configuration file should be used as the source of memory protection bit values, or if the code file should be used as the source. The options specified in the main GUI are the same ones saved in the configuration file (User-defined option). If the code file is used as the source, the protection bits must be specified at the correct address within the code file. Correct addresses can be obtained from device manuals. The GUI provides an option to inspect memory protection bits as read from the code file (From File option).

If the FILE_SOURCE value is chosen for this parameter, the only parameters in this section that will also be read are “LM_USER_REG_WrEn” and “LM_USER_DBG_WrEn". The former enables writes to USER REGs and the latter must be enabled to write to the register that controls communication debug access.

Logically grouped together with all LM parameters in this section.

  • USER_SOURCE (0) : Protection settings from the configuration file will be used (can be user defined in GUI).

  • FILE_SOURCE (1) : Protection settings from code file will be used (code file must include protection bits at proper addresses). (default)

2. "LM_USER_DBG WrEn"

This configuration parameter enables writes to the register that controls communication debug access.

Logically grouped together with “LM-UserDebugData”.

  • 1 : enabled

  • 0 : disabled (default)

2.1. "LM-UserDebugData"

Value that will be written to the BOOTCFG register if LM_USER_DBG_WrEn is enabled, and “LM_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

3. "LM_USER_REG_WrEn"

This configuration parameter enables writes to USER REGs.

Logically grouped together with LM-USER REG0-3

  • 1 : enabled

  • 0 : disabled (default)

3.1. "LM-USER REG0" - "LM-USER REG3"

Value that will be written to the USER REG0-3 register if “LM_USER_REG_WrEn” is enabled, and “LM_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

4. "LM-FMPReadEn0-Data" - "LM-FMPReadEn15-Data"

Value that will be written to the FMPRE0-FMPRE15 register if “LM_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

5. "LM-FMPPrgEn0-Data" - "FMPPrgEn15-Data"

Value that will be written to the FMPPE0-FMPPE15 register if “LM_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise.

6. "MSP432_MemoryProtSource"

This configuration option specifies whether the configuration file should be used as the source of memory protection bit values, or if the code file should be used as the source. The options specified in the main GUI are the same ones saved in the configuration file (User-defined option). If the code file is used as the source, the protection bits must be specified at the correct address within the code file. Correct addresses can be obtained from device manuals. The GUI provides an option to inspect memory protection bits as read from the code file (From File option).

If the FILE_SOURCE value is chosen for this parameter, the only parameters in this section that will also be read are “MSP432_MailBox_WrEn” and “MSP432_ClrLockingOptions”.

Logically grouped together with all MSP432_ parameters in this section.

  • USER_SOURCE (0) : Protection settings from the configuration file will be used (can be user defined in GUI).

  • FILE_SOURCE (1) : Protection settings from code file will be used (code file must include protection bits at proper addresses). (default)

7. "MSP432_ClrLockingOptions"

If enabled, during the F_Clear_Locked_Device procedure (Factory Erase) , the FCCTL BANK0 WEPROT and FCCTL BANK0 WEPROT registers will be written to 0, otherwise they will be written to 3.

  • 1 : enabled (default)

  • 0 : disabled

8. "MSP432_MailBox_WrEn"

This configuration parameter enables writes to the MSP432 mailbox.

  • 1 : enabled

  • 0 : disabled (default)

8.1. "MSP432_MB_CMD"

Value that will be written to the Mailbox command register if “MSP432_MailBox_WrEn” is enabled, and “MSP432_MemoryProtSource” is set to USER_SOURCE. Ignored otherwise. This value enables one or multiple commands to be executed when the MCU boots again after option byte programming. Therefore this value is an OR-ed value of all the enabled commands. Subsequent configuration values depend on the particular Mailbox command being enabled otherwise they will be ignored by the MCU.

8.2. "MSP432_MB_JTAG_SWD_LOCK_SECEN"

JTAG/SWD Lock command enable.

8.2.1. "MSP432_MB_JTAG_SWD_LOCK_AES_INIT_VECT[0]" - "MSP432_MB_JTAG_SWD_LOCK_AES_INIT_VECT[3]"

Value written to AES Init Vector register 0-3

8.2.2. "MSP432_MB_JTAG_SWD_LOCK_AES_SECKEYS[0]" - "MSP432_MB_JTAG_SWD_LOCK_AES_SECKEYS[7]"

Value written to AES Security Key register 0-7

8.2.3. "MSP432_MB_JTAG_SWD_LOCK_UNENC_PWD[0]" - "MSP432_MB_JTAG_SWD_LOCK_UNENC_PWD[3]"

Value written to AES Unencrypted Password register 0-3

8.3. "MSP432_MB_SEC_ZONE0_SECEN" - "MSP432_MB_SEC_ZONE3_SECEN"

Secure Zone 0-3 command enable.

8.3.1. "MSP432_MB_SEC_ZONE0_START_ADDR" - "MSP432_MB_SEC_ZONE3_START_ADDR"

Value written to Zone 0-3 Start Address register.

8.3.2. "MSP432_MB_SEC_ZONE0_LENGTH" - "MSP432_MB_SEC_ZONE3_LENGTH"

Value written to Zone 0-3 Length register.

8.3.3. "MSP432_MB_SEC_ZONE0_AESINIT_VECT[0]" - "MSP432_MB_SEC_ZONE3_AESINIT_VECT[3]"

Value written to Zone 0-3 AES Init Vector register 0-3.

8.3.4. "MSP432_MB_SEC_ZONE0_SECKEYS[0]" - "MSP432_MB_SEC_ZONE3_SECKEYS[7]"

Value written to Zone 0-3 Security Key register 0-7.

8.3.5. "MSP432_MB_SEC_ZONE0_UNENC_PWD[0]" - "MSP432_MB_SEC_ZONE3_UNENC_PWD[3]"

Value written to Zone 0-3 Unencrypted Password register 0-3.

8.3.6. "MSP432_MB_SEC_ZONE0_ENCUPDATE_EN" - "MSP432_MB_SEC_ZONE3_ENCUPDATE_EN"

Value written to Zone 0-3 Encryption Update Enable register.

8.3.7. "MSP432_MB_SEC_ZONE0_DATA_EN" - "MSP432_MB_SEC_ZONE3_DATA_EN"

Value written to Zone 0-3 Data Enable register.

8.4. "MSP432_MB_BSL_Enable"

BSL Config command enable.

8.4.1. "MSP432_MB_BSL_Start_Addr""

Value written to BSL Start Address register.

8.4.2. "MSP432_MB_BSL_Hard_Inv_Params"

Value written to BSL hard. inv. parameter register.

8.5. "MSP432_MB_JTAG_SWD_LOCK_ENCPAYLOADADDR"

Value written to JTAG/SWD Lock update command, load address register.

8.5.1. "MSP432_MB_JTAG_SWD_LOCK_ENCPAYLOADLEN"

Value written to JTAG/SWD Lock update command, load length register.

8.5.2. "MSP432_MB_JTAG_SWD_LOCK_DST_ADDR"

Value written to JTAG/SWD Lock update command, destination register.

8.6. "MSP432_MB_SEC_ZONE0_PAYLOADADDR" - "MSP432_MB_SEC_ZONE3_PAYLOADADDR"

Value written to Zone 0-3 update command, payload address register.

8.6.1. "MSP432_MB_SEC_ZONE0_PAYLOADLEN"

Value written to Zone 0-3 update command, payload length register.

8.7. "MSP432_MB_FACTORY_RESET_PARAMS_EN"

Factory Reset Params command enable.

8.7.1. "MSP432_MB_FACTORY_RESET_PARAMS_PWDEN"

Value written to password enable register.

8.7.2. MSP432_MB_FACTORY_RESET_PARAMS_PWD[0]" - MSP432_MB_FACTORY_RESET_PARAMS_PWD[3]"

Value written to password 0-3 register.

8.8. "MSP432_MB_FACTORY_RESET_PWD[0]" - "MSP432_MB_FACTORY_RESET_PWD[3]"

Value written to Factory Reset command, password register 0-3.

9. "RF432_MemoryProtSource"

This configuration option specifies whether the configuration file should be used as the source of memory protection bit values, or if the code file should be used as the source. The options specified in the main GUI are the same ones saved in the configuration file (User-defined option). If the code file is used as the source, the protection bits must be specified at the correct address within the code file. Correct addresses can be obtained from device manuals. The GUI provides an option to inspect memory protection bits as read from the code file (From File option).

If the FILE_SOURCE value is chosen for this parameter, the only parameters in this section that will also be read are "RF432_DbgPass_WrEn".

  • USER_SOURCE (0) : Protection settings from the configuration file will be used (can be user defined in GUI).

  • FILE_SOURCE (1) : Protection settings from code file will be used (code file must include protection bits at proper addresses). (default)

10. "RF432_DbgPass_WrEn"

This configuration parameter enables writes to RF432 debug registers. The GUI in Setup->Memory Protection has a validation button that can be useful for checking and fixing the configuration.

  • 1 : enabled

  • 0 : disabled (default)

10.1. "RF432_DbgPass_Ptr"

Value written to Debug Password Pointer register.

10.2. "RF432_DbgPass0" - "RF432_DbgPass3"

Value written to Password 0-3 registers (PTR + 0x0, +0x4, +0x8, +0xC)

10.3. "RF432_DbgPassCRC"

Value written to Password CRC register (PTR + 0x10)