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Code Block
INFO:           DT: bsec_probe() OK
INFO:           DT: dt_open_and_check() OK
INFO:           DT: stm32mp1_clk_probe() OK
ERROR:   CLKSRC 281 start failed @ 0x50000028: 0x1
INFO:           DT: stm32mp1_clk_init() ERROR
ERROR:          TFA PANIC at func: "bl2_el3_plat_arch_setup() file "plat/st/stm32mp1/bl2_plat_setup.c" l.:322";
PANIC at PC : 0x2ffec63f
Exception mode=0x00000016 at: 0x2ffec63f

In this particular setup (environment is ST Toolkit version 4, and board Karo TXMP-1570 with STM32MP157C MPU) the problem lies in HSE configuration. Documentation could be found in STM32MP157 Reference Manual (RM0436 Rev 6, pp.526) and Trusted Firmware ARM (TFA) synchronized with ST Toolkit version 4 (Developer Package v4 TFA/plat/st/stm32mp1/bl2_plat_setup.c l. 322 provides about probable problem with clock). It is quite easy to figure out where lies source of problem - in clock or uart configuration.

Karo environment

Secondly please analyze Karo documentation and build environment with Karo build tutorial. Then build image with usage of provided instructions and analyze board TFA source code. Find board Device Tree and analyze clock and uart nodes.

DTmin analysis

Thirdly export minimal Device Tree used in GangFlasher-ST. For doing this there is special DLL function. In GF-CLI use function F_SaveDTmin(1, DTmin.dtb)to save processed DTmin. Exported file must be recompiled with usage od Device Tree Compiler (DTC) dtc -I dtb -O dts -o DTmin.dts DTmin.dtb. Open recompiled DTmin source file and compare it with Karo source code. It could be ease to compare two recompiled source files with source comparation tool for example Meld.

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It is obvious that clocks node could differ in HSE Digital clock source bypass mode. It is possible to edit minimal Device Tree with DTmin configuration file.

DTmin configuration file